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初級
完成時間大約為46 小時
英語(English)
字幕:英語(English)
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完成後獲得證書
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初級
完成時間大約為46 小時
英語(English)
字幕:英語(English)

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米兰理工大学 徽標

米兰理工大学

教學大綱 - 您將從這門課程中學到什麼

1

1

完成時間為 6 小時

A Bird's Eye View on Adaptive Computing Systems

完成時間為 6 小時
7 個視頻 (總計 29 分鐘), 5 個閱讀材料, 5 個測驗
7 個視頻
Reconfiguration in Everyday Life2分鐘
The Needs for Adaptation: an overview4分鐘
FPGA and reconfiguration: a 1st definition5分鐘
Runtime management2分鐘
Programmable System-on-Chip4分鐘
Programmable System-on-Multiple Chip6分鐘
5 個閱讀材料
Self-Aware Adaptation in FPGA-based Systems [suggested readings]30分鐘
Self-Awareness as a Model for Designing and Operating Heterogeneous Multicores [suggested readings]1小時
Reconfigurable computing: a survey of systems and software [suggested readings]2小時
ReconOS: An Operating System Approach for Reconfigurable Computing [suggested readings]30分鐘
R3TOS-Based Autonomous Fault-Tolerant Systems [suggested readings]30分鐘
5 個練習
Reconfigurations15分鐘
History of Reconfiguration8分鐘
FPGA and reconfiguration30分鐘
Programmable SoC Vs SoMCs7分鐘
Runtime management30分鐘
完成時間為 6 小時

An introduction to Reconfigurable Computing

完成時間為 6 小時
5 個視頻 (總計 27 分鐘), 4 個閱讀材料, 2 個測驗
5 個視頻
Reconfigurable Computing: HW vs SW3分鐘
On how to improve the Reconfigurable computing performance via CAD improvements3分鐘
FPGA-Based Reconfigurable Computing3分鐘
System design space exploration and rationale behind partial reconfiguration15分鐘
4 個閱讀材料
A platform-independent runtime methodology for mapping multiple applications onto FPGAs through resource virtualization [suggested readings]45分鐘
A Heterogeneous Multicore System on Chip with Run-Time Reconfigurable Virtual FPGA Architecture [suggested readings]1小時
Partitioning and Scheduling of Task Graphs on Partially Dynamically Reconfigurable FPGAs [suggested readings]1小時
A Mapping-Scheduling Algorithm for Hardware Acceleration on Reconfigurable Platforms [suggested readings]1 小時 30 分
2 個練習
Reconfigurable Computing Module30分鐘
Performance30分鐘
2

2

完成時間為 5 小時

Reconfigurable Computing and FPGAs

完成時間為 5 小時
8 個視頻 (總計 36 分鐘), 3 個閱讀材料, 2 個測驗
8 個視頻
FPGA Basic Block: CLBs and IOBs6分鐘
FPGA Basic Block: Interconnections5分鐘
FPGA Configuration: an overview2分鐘
More Details on How To Configure and FPGA: the bitstream files4分鐘
Bitstream Composition4分鐘
Configuration Registers6分鐘
How to handle the complexity of an FPGA-based system4分鐘
3 個閱讀材料
Note on the "Resources"1分鐘
Physical design for FPGAs [suggested readings]1 小時 30 分
Multi-Million Gate FPGA Physical Design Challenges [suggested readings]1 小時 30 分
2 個練習
Getting familiar with FPGAs34分鐘
FPGA configuration and Bitstream30分鐘
完成時間為 2 小時

Examples on how to configure an FPGA

完成時間為 2 小時
6 個視頻 (總計 42 分鐘)
6 個視頻
From the LUT to the CLB configuration example8分鐘
A simplified FPGA and its configuration settings4分鐘
An Example on how to implement a circuit on a simplified FPGA8分鐘
An Example on how to implement a circuit on a simplified FPGA: bitstram generation phase - CLBs5分鐘
An Example on how to implement a circuit on a simplified FPGA: bitstram generation phase - SBs and routing4分鐘
2 個練習
LUT and CLB30分鐘
Physical design30分鐘
3

3

完成時間為 6 小時

An Introduction to Reconfigurations

完成時間為 6 小時
5 個視頻 (總計 35 分鐘), 2 個閱讀材料, 2 個測驗
5 個視頻
The 5 W's6分鐘
Reconfigurable Computing as an Exstension of HW/SW Codesing5分鐘
A Classification of SoC Reconfigurations8分鐘
A Classification of SoMC Reconfigurations9分鐘
2 個閱讀材料
Design methodology for partial dynamic reconfiguration: a new degree of freedom in the HW/SW codesign [suggested readings]1小時
Performance of partial reconfiguration in FPGA systems: A survey and a cost model [suggested readings]3小時
2 個練習
Functionalities and their implementations30分鐘
Module Review30分鐘
完成時間為 6 小時

Towards Partial Dynamic Reconfiguration and Complex FPGA-based systems

完成時間為 6 小時
8 個視頻 (總計 40 分鐘), 4 個閱讀材料, 2 個測驗
8 個視頻
How to use FPGA Reconfiguration to face area issues5分鐘
How to deal with the Reconfiguration runtime overhead3分鐘
Recurring modules to reuse them to reduce the Reconfiguration time3分鐘
Partial Reconfiguration to reduce the Reconfiguration runtime overhead5分鐘
Runtime management to explore alternative implementations5分鐘
Bitstreams relocation6分鐘
Bitstreams relocation and virtual homogeneity3分鐘
4 個閱讀材料
Operating system runtime management of partially dynamically reconfigurable embedded systems [suggested readings]1小時
Core Allocation and Relocation Management for a Self Dynamically Reconfigurable Architecture [suggested readings]1小時
A runtime relocation based workflow for self dynamic reconfigurable systems design [suggested readings]1小時
Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux [suggested readings]1 小時 30 分
2 個練習
Reconfigurable System30分鐘
Partial reconfiguration30分鐘
4

4

完成時間為 10 小時

Design Flows

完成時間為 10 小時
9 個視頻 (總計 54 分鐘), 7 個閱讀材料, 3 個測驗
9 個視頻
Partial Reconfiguration Design Flows4分鐘
Xilinx Difference Based Partial Reconfiguration5分鐘
Xilinx Module Based Partial Reconfiguration5分鐘
Xilinx Partial Reconfiguration (PR) Flow5分鐘
Moudle Based vs Partial Reconfiguration Design Flows17分鐘
Rationale behind DRESD and the work done by the Politecnico di Milano3分鐘
From DRESD to CHANGE and ASAP, two new research initiatives from the Politecnico di Milano4分鐘
CAOS: from embedded to heterogeneous distributed FPGA-based computing systems3分鐘
7 個閱讀材料
Vivado Design Suite Tutorial, Partial Reconfiguration, UG947 (v2016.1) April 6, 2016 [suggested readings - handbook - PDF]1 小時 30 分
Vivado Design Suite User Guide, Partial Reconfiguration, UG909 (v2016.1) April 6, 2016 [suggested readings - handbook - PDF]3小時
Dynamic Reconfigurability in Embedded System Design [suggested readings]30分鐘
A design methodology for dynamic reconfiguration: the Caronte architecture [suggested readings]30分鐘
Floorplanning Automation for Partial-Reconfigurable FPGAs via Feasible Placements Generation [suggested readings]45分鐘
Heterogeneous exascale supercomputing: The role of CAD in the exaFPGA project [suggested readings]30分鐘
The Role of CAD Frameworks in Heterogeneous FPGA-Based Cloud Systems [suggested readings]30分鐘
3 個練習
Abstractions30分鐘
Politecnico di Milano Partial Reconfiguration Research Initiatives30分鐘
Design flows30分鐘
完成時間為 6 小時

Closing remarks and future directions

完成時間為 6 小時
1 個視頻 (總計 5 分鐘), 3 個閱讀材料, 1 個測驗
3 個閱讀材料
Virtualized Execution Runtime for FPGA Accelerators in the Cloud [suggested readings]1 小時 45 分
A cloud-scale acceleration architecture [suggested readings]2小時
Enabling Flexible Network FPGA Clusters in a Heterogeneous Cloud Data Center [suggested readings]1 小時 30 分
1 個練習
Closing remarks and future directions30分鐘

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