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學生對 科罗拉多大学波德分校 提供的 Hardware Description Languages for FPGA Design 的評價和反饋

4.4
459 個評分
128 條評論

課程概述

This course can also be taken for academic credit as ECEA 5361, part of CU Boulder’s Master of Science in Electrical Engineering degree. Hardware Description Languages for Logic Design enables students to design circuits using VHDL and Verilog, the most widespread design methods for FPGA Design. It uses natural learning processes to make learning the languages easy. Simple first examples are presented, then language rules and syntax, followed by more complex examples, and then finally use of test bench simulations to verify correctness of the designs. Lecture presentations are reinforced by many programming example problems so that skill in the languages is obtained. After completing this course, each student will have fundamental proficiency in both languages, and more importantly enough knowledge to continue learning and gaining expertise in Verilog and VHDL on their own....

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JS

2021年6月6日

I really liked this course . if someone wants to know how digital circuits are made inside of computer then this course could be proven as turning point in his way of learning .

DR

2022年2月20日

There are so much use cases that i can apply in my life. thanks so much for giving the psychology know how into the lecture to help us in understanding the root course

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51 - Hardware Description Languages for FPGA Design 的 75 個評論(共 128 個)

創建者 silpa k v

2020年5月6日

Good description and Way of explaining.

Forums helping out more.

Thankyou.

創建者 RANJAN Y R Y

2020年4月18日

The course is best for beginners and very useful to practice the basics.

創建者 waseem a

2020年3月22日

This course really great and have a lot of fun to learn FPGA Designs.

創建者 Chathura J G

2020年7月7日

Best Course I ever had. Lectures are extremely talented in teaching.

創建者 Phanindra D

2020年3月17日

Great course with in-depth explanations of HDL with Verilog and VHDL

創建者 Orzumamadov G M

2020年7月10日

Thanks to the authors for such an interesting and useful course.

創建者 kasani J g

2020年5月5日

it is really fun to learn this course you will really enjoy it,

創建者 Ahmed R M

2020年10月26日

it's very useful course for beginning programming with PFGA

創建者 SALCEDO, N V

2020年9月29日

Great course to explore the comparison of VHDL and Verilog.

創建者 Egar P

2022年2月9日

Amazing course! It helps me understand better about HDL

創建者 mandeep s r

2020年8月1日

This is one of the best courses available on coursera.

創建者 Mahendra V

2020年6月6日

Good Learning with structured assignments.

創建者 himanshu g

2020年3月29日

A Nice Course which required more hardwork

創建者 Soorya K

2020年5月8日

Assignment programs are very challenging.

創建者 SAMUELJUDE S

2020年7月7日

extremely short crisp and knowledgeable

創建者 Apurba D

2020年8月9日

Liked the programming assignments...

創建者 patrick

2020年8月2日

good mix between theory and practice

創建者 Ehtesham A K

2020年5月19日

Excellent Course for FPGA learners.

創建者 Carlos M

2021年3月8日

Excellent materials and exercises.

創建者 P S

2020年8月6日

Very well explained the concepts.

創建者 Ashish S

2020年10月1日

Good Study material for Beginner

創建者 Kondapally M R

2020年6月24日

very informative and practical

創建者 Abdul A

2020年11月27日

Really a great experience!!

創建者 wei z

2021年10月18日

very impressive materials

創建者 MAVURU H K

2020年8月31日

this course is very nice.