Multilevel Logic: Finding the Kernels

Loading...
來自 University of Illinois at Urbana-Champaign 的課程
VLSI CAD Part I: Logic
75 個評分
University of Illinois at Urbana-Champaign
75 個評分
從本節課中
2-Level Logic Synthesis, and Multi-Level Logic Synthesis via the Algebraic Model
In Week 3, we will move from "representing" things to "synthesizing" things. In this case, synthesis means "optimization", or maybe the word "minimization" is more familiar from hand work with Kmaps or Boolean algebra.

與講師見面

  • Rob A. Rutenbar
    Rob A. Rutenbar
    Adjunct Professor
    Department of Computer Science

探索我們的目錄

免費加入並獲得個性化推薦、更新和優惠。