This course will introduce you to all aspects of development of Soft Processors and Intellectual Property (IP) in FPGA design. You will learn the extent of Soft Processor types and capabilities, how to make your own Soft Processor in and FPGA, including how to design the hardware and the software for a Soft Processor. You will learn how to add IP blocks and custom instructions to your Soft Processor. After the Soft Processor is made, you learn how to verify the design using simulation and an internal logic analyzer. Once complete you will know how to create and use Soft Processors and IP, a very useful skill.
FPGA Design for Embedded Systems 專項課程科罗拉多大学波德分校課程信息
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100% 在線
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第 3 門課程（共 4 門）
中級
Practicing engineer or graduate level engineering student.
完成時間大約為10 小時
英語（English）
字幕：阿拉伯語（Arabic）, 法語（French）, （歐洲人講的）葡萄牙語, 意大利語, 越南語, 德語（German）, 俄語（Russian）, 英語（English）, 西班牙語（Spanish）
您將獲得的技能
- Software Design for Softcore Processors
- Softcore Processor Design
- Programmable Logic Design
- Simulation for Verification
- Intellectual Property Integration
可靈活調整截止日期
根據您的日程表重置截止日期。
可分享的證書
完成後獲得證書
100% 在線
立即開始，按照自己的計劃學習。
第 3 門課程（共 4 門）
中級
Practicing engineer or graduate level engineering student.
完成時間大約為10 小時
英語（English）
字幕：阿拉伯語（Arabic）, 法語（French）, （歐洲人講的）葡萄牙語, 意大利語, 越南語, 德語（German）, 俄語（Russian）, 英語（English）, 西班牙語（Spanish）
提供方
科罗拉多大学波德分校
CU-Boulder is a dynamic community of scholars and learners on one of the most spectacular college campuses in the country. As one of 34 U.S. public institutions in the prestigious Association of American Universities (AAU), we have a proud tradition of academic excellence, with five Nobel laureates and more than 50 members of prestigious academic academies.
立即開始攻讀碩士學位
此 課程 隸屬於 科罗拉多大学波德分校 提供的 100% 在線 Master of Science in Electrical Engineering。
如果您被錄取參加全部課程，您的課程將計入您的學位學習進程。
授課大綱 - 您將從這門課程中學到什麼
完成時間為 2 小時
Softcore Processor Development Flow
This module introduces the concept of a soft processor in general, and of hardware design for the soft processor in particular. It presents an overview of soft processors, describing all the different kinds that are available from Xilinx, Altera, Microsemi, and Lattice and then goes into depth about the Nios II soft processor from Altera. The benefits of using soft processors to prevent obsolescence and provide flexibility are explained. The content guides you through a hardware design of the Nios II processor using Qsys, the Altera system design tool. Lastly, design of a custom instruction in the Nios II is presented, showing the versatility of the soft processor in an FPGA.
完成時間為 2 小時
11 個視頻 （總計 86 分鐘）, 1 個閱讀材料, 1 個測驗
完成時間為 3 小時
Writing Software for Softcore Processors
This module delves further into the development of soft processors, It describes the soft processor development flow in more detail, including the tools needed to develop software for the soft processor. It then introduces the Eclipse-based IDE for Nios II software development, and then shows how the output of the Qsys design is used to establish a Board Support Package (BSP) for the processor, which is necessary because the processor hardware design can be changed and the BSP software library must support any changes. Use of the BSP editor to configure the processor by programming control registers is demonstrated. Finally, the use of the custom instruction developed in Module 1 is presented, including the use of software macros to complete the implementation of the custom instruction.
完成時間為 3 小時
8 個視頻 （總計 33 分鐘）, 1 個閱讀材料, 1 個測驗
完成時間為 2 小時
IP Acquisition and Integration
Modern FPGA design is no longer centered on HDL module design as it is on acquisition and use of IP Cores. In this Module we will introduce IP cores including offerings from all the major vendors, Intel Altera, Xilinx, Microchip Microsemi, and Lattice. You will learn how to find, acquire, and use these cores.
完成時間為 2 小時
6 個視頻 （總計 26 分鐘）, 1 個閱讀材料, 1 個測驗
完成時間為 4 小時
Introducing ModelSim and Simulation for Verification
As we work on more complex FPGA designs, the challenges to create an error-free design mount exponentially. Having a good grasp of the tools needed to verify correctness of design has become more and more important. After introducing simulation in previous sessions, in this module we will examine simulation with ModelSim in more depth by working through some examples. This will show the utility of simulation for verification and debugging. This module will also describe in some detail how the simulator works and how it achieves concurrency through the use of delta delays. As a final step in the debugging process, the internal logic analyzer SignalTap II is introduced.
完成時間為 4 小時
8 個視頻 （總計 67 分鐘）, 1 個閱讀材料, 1 個測驗
審閱
- 5 stars50%
- 4 stars16.07%
- 3 stars25%
- 2 stars5.35%
- 1 star3.57%
來自FPGA SOFTCORE PROCESSORS AND IP ACQUISITION的熱門評論
由 OS 提供2020年12月8日
I feel I did another small step towards mastering designing with fpga. Thank you!
由 HS 提供2021年9月7日
The course bring good theoric bases to IPCores but leaves short informacion about the Qsys use, memory map and others things that are necesary for system integration.
由 MB 提供2021年8月11日
I was hoping to get more lecture material on writing testbench code.
由 KS 提供2020年10月13日
I learned a lot about modelsim that I was really needed.
關於 FPGA Design for Embedded Systems 專項課程
The objective of this course is to acquire proficiency with Field Programmable Gate Arrays (FPGA)s for the purpose of creating prototypes or products for a variety of applications. Although FPGA design can be a complex topic, we will introduce it so that, with a little bit of effort, the basic concepts will be easily learned, while also providing a challenge for the more experienced designer. We will explore complexities, capabilities and trends of Field Programmable Gate Arrays (FPGA) and Complex Programmable Logic Devices (CPLD). Conception, design, implementation, and debugging skills will be practiced. We will learn specifics around embedded IP and processor cores, including tradeoffs between implementing versus acquiring IP. Projects will involve the latest software and FPGA development tools and hardware platforms to help develop a broad perspective of the capabilities of various Programmable SoC solutions. Topics include:
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